The Need

Next‑generation power electronic systems require devices that deliver high breakdown voltage, large current handling, and fast switching while maintaining manufacturability at scale. Vertical FinFETs offer compelling performance advantages over incumbent bipolar and planar technologies, but their commercial adoption has been constrained by complex, alignment‑sensitive fabrication flows that increase cost, reduce yield, and limit scalability. There is a clear unmet need for a vertical FinFET architecture that preserves performance benefits while significantly simplifying manufacturing.

The Technology

OSU engineers have developed an Isolated Source Electrode vertical FinFET (ISE-finFET) architecture that incorporates a strategically placed non‑conductive region beneath a portion of the source electrode. This new design relaxes lithographic alignment requirements and eliminates multiple critical fabrication steps common to conventional vertical FinFETs. The result is a robust vertical transistor architecture that maintains full gate control and device performance while enabling a more manufacturing‑friendly process flow.

Commercial Applications

• Power transistors for automotive and industrial power conversion
• High‑voltage, high‑frequency power management integrated circuits
• Power devices for renewable energy inverters and grid infrastructure
• Compact power modules for data centers and consumer electronics

Benefits/Advantages

• Manufacturing Simplification: Eliminates alignment‑critical and planarization steps that drive complexity and cost
• Improved Yield Robustness: Device functionality tolerates micron‑scale lithographic misalignment
• Performance Preservation: Retains advantages of vertical FinFETs, including normally‑off operation and fast switching
• Scalable Architecture: Adaptable to multiple material systems and vertical device platforms